Ivy Micro

Interconnect IP for AI Infrastructure

Building the Fabric
that Connects AI Systems

From on-chip networks to cluster-scale interconnects — complete IP portfolio for AI accelerators, data center infrastructure, and heterogeneous computing.

Technology

Scale Architecture for AI Workloads

Scale On-Chip

Network-on-Chip for AI accelerators

<10ns latency, coherence-aware

Scale Up

Memory pooling within rack

<500ns latency, CXL 3.0

Scale Out

Cluster-scale networking

2-5us latency, 400G/800G Ethernet

IP Portfolio

Complete Interconnect Stack

Production-ready IP blocks with comprehensive verification, software stacks, and integration support.

IvyLink™ NoC

Scale On-Chip

  • • AXI/CHI protocol support
  • • AI-optimized routing algorithms
  • • Configurable topology (mesh, ring, torus)
  • • QoS and bandwidth allocation

IvyLink™ CXL

Scale Up

  • • CXL 3.0 Type 3 controller
  • • Memory pooling and sharing
  • • Fabric manager reference
  • • Linux driver support

IvyLink™ UEC

Scale Out

  • • UEC 1.0 transport layer
  • • RDMA NIC (RNIC) controller
  • • Congestion control (HPCC/DCQCN)
  • • rdma-core software stack

IvyLink™ LZ4

Data Efficiency

  • • Hardware LZ4 compression
  • • AI tensor compression (FP16/BF16)
  • • Line-rate processing (100G-400G)
  • • Integrates with CXL/UEC

Applications

Target Markets

AI Accelerators

Training and inference chips for LLMs, vision models, and recommendation systems.

  • • NPU/TPU on-chip interconnect
  • • HBM/CXL memory interfaces
  • • Multi-chip scaling (Chiplet)

Data Center Infrastructure

SmartNICs, DPUs, and network fabric for hyperscale data centers.

  • • UEC/RoCE NIC controllers
  • • Memory pooling and disaggregation
  • • Storage networking (NVMe-oF)

Heterogeneous Computing

CPU+GPU+NPU systems with coherent memory and efficient data movement.

  • • Coherent interconnect (CHI/CXL)
  • • Memory sharing across accelerators
  • • Chiplet integration (UCIe)

Company

About Ivy Micro

Ivy Micro was founded with a simple mission: to build the interconnect fabric that powers AI infrastructure.

Our team brings deep expertise in network-on-chip, data center networking, and memory systems from leading semiconductor companies and hyperscalers.

Based in the UK, we serve customers worldwide with production-ready IP, comprehensive documentation, and responsive engineering support.

10+

Years of team expertise in interconnect design

3

Production-ready IP blocks

UK

Based, serving global customers

UEC

General Member, participating in standards

Contact

Get in Touch

Interested in licensing our IP or discussing your project? Reach out to our team.